Pulse 280 Specifications Page 17

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Operational Description of HRPWM
Table 5. Duty Cycle Range Limitation for 3 and 6 SYSCLK/TBCLK Cycles
PWM Frequency
(1)
3 Cycles 6 Cycles SYSCLKOUT
(kHz) Minimum Duty Minimum Duty
200 0.6% 1.2%
400 1.2% 2.4%
600 1.8% 3.6%
800 2.4% 4.8%
1000 3.0% 6.0%
1200 3.6% 7.2%
1400 4.2% 8.4%
1600 4.8% 9.6%
1800 5.4% 10.8%
2000 6.0% 12.0%
(1)
System clock - T
SYSCLKOUT
= 10 ns
System clock = TBCLK = 100 MHz
If the application demands HRPWM operation in the low percent duty cycle region, then the HRPWM can
be configured to operate in count-down mode with the rising edge position (REP) controlled by the MEP.
This is illustrated in Figure 7. In this case, low percent duty limitation is no longer an issue. However, there
will be a maximum duty limitation with same percent numbers as given in Table 5 .
17
SPRU924F April 2005 Revised October 2011 High-Resolution Pulse Width Modulator (HRPWM)
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Copyright © 20052011, Texas Instruments Incorporated
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